I. Field
The present disclosure relates generally to electronics, and more specifically to latches.
II. Background
A latch is a circuit that can store one bit of information and can be controlled by a clock signal or some other control signal. A latch may have two operating modes, a tracking mode and a holding mode, which may be selected by the clock signal. These operating modes may also be referred to by other names. The output of the latch may follow an input signal during the tracking mode, e.g., when the clock signal is at logic high. A data value may be captured by the latch, e.g., when the clock signal transitions to logic low. The captured value may be retained and provided to the latch output during the holding mode, e.g., when the clock signal is at logic low. A latch may also be triggered by low logic, rising edge, or falling edge of a clock signal.
Latches are commonly used in various circuits and applications. For example, latches may be used in frequency dividers, which are often used in receivers and transmitters. A frequency divider may receive a VCO signal from a voltage controlled oscillator (VCO), divide the VCO signal in frequency by a factor of N, and provide a divider signal having a frequency that is 1/N-th the frequency of the VCO signal, where N may be an integer or non-integer value. Since the VCO signal may be at a high frequency, high-speed latches that consume low power are highly desirable.